Sr. Staff Engineer, Formal Verification

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THE ROLE:

AMD is looking for a Sr. Staff Engineer, Formal Verification leader passionate about driving the cutting-edge formal verification techniques for AMD's next generation graphics IP design. The ideal candidate will have proven experience in driving cutting-edge formal verification methodology to achieve industry leading verification quality and productivity under tight schedule. In this role the candidate will work with architecture team, design team and central formal verification team to define our formal verification roadmap, strategy, methodology, infrastructure and expand formal verification adoption through project execution. The candidate will be the primary point of contact for all GFXIP formal verification practice.

You will be a member of a core team of incredibly talented industry specialists and will work with the latest and rapidly evolving graphics IP design.

THE PERSON:

The ideal candidate should have demonstrated rich experience in formal verification techniques for complicated modern processors(CPU, GPU, AI processor, etc.) and must possess leadership skills to influence and drive the whole formal verification team in GFXIP. Able to communicate effectively and work optimally with different teams across the organization.

KEY RESPONSIBLITIES:

• Define long-term strategy for formal verification expansion and steer the technical roadmap
• Develop cutting-edge formal verification methodology to cover the whole graphics design, including both datapath and control logic. Scale formal verification to big and critical design for bug-free quality. Expand formal verification adoption to the whole IP development life cycle. Resolve challenging convergence issue through world class formal verification techniques like induction, reduction, abstraction, etc.
• Define and drive the best-in-class formal verification infrastructure to improve formal verification productivity. Enable more verification engineers to adopt this advanced verification technology without deep formal verification knowledge
• Lead the research group for emerging formal verification domains like security, safety, low power, architect level formal verification, etc. Explore the feasibility of formalizing ISA and memory model for GFXIP design
• Stay informed of latest trends and innovations in formal verification. Develop technical relationship with broader AMD Design community and peers. Drive cross-department innovation and collaboration inside AMD

PREFERRED EXPERIENCE:

• In-depth knowledge in formal verification algorithms, engines and use cases
• Proven expertise in system Verilog assertion and abstract model development
• Expert user of formal verification tool from both academy and EDA vendors(JasperGold, VC formal, Murphi, theorem prover)
• Proven track record of delivering high quality verification under tight schedule for modern, large scale processor design like CPU, GPU or AI processor. Comprehensive knowledge of computer architecture and graphics pipeline
• Proven expertise in developing formal verification infrastructure for FPV, DPV, SEV and other use cases is strongly preferred

ACADEMIC CREDENTIALS:

• Undergrad degree required. Master or PhD degree in Computer Science/ Computer Engineering/ Electrical Engineering preferred

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AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.