New

Staff Yield Engineer

NOKIA
United States, California, San Jose
6373 San Ignacio Avenue (Show on map)
Jul 13, 2026
Role Summary We are seeking a Staff Yield Engineer to lead yield improvement initiatives and develop scalable process control methodologies for a rapidly growing InP photonic integrated circuit (PIC) wafer fab. This role operates with a high degree of independence in a fast-paced manufacturing environment, driving complex technical issues from problem identification through sustainable corrective actions. Working closely with Integration, Process, Equipment, and Manufacturing Operations, the engineer will play a key role in improving fab yield performance, enabling Fab2 ramp readiness, and strengthening manufacturing quality systems. Key Responsibilities Lead Yield Improvement Lead yield improvement initiatives by identifying key yield detractors, prioritizing improvement opportunities, and driving structured problem-solving to improve fab performance and manufacturing robustness. Process Control Develop and deploy practical process control methodologies and control plans to reduce process variation and support stable high-volume manufacturing. Support new product ramp readiness by translating proven process control methodologies and manufacturing best practices from Fab to Fab into scalable monitoring and control frameworks. Root Cause Investigation Support root cause investigations for critical yield excursions and complex manufacturing issues by applying structured engineering analysis, manufacturing data, and appropriate analytical techniques to identify effective corrective and preventive actions. Cross-functional Execution Drive cross-functional resolution of critical yield excursions, wafer scrap, and quality incidents by coordinating Integration, Process, Equipment, Facilities, and Manufacturing teams using structured 8D methodology. Demonstrate strong ownership, urgency, and execution discipline to ensure timely and sustainable closure. Quality Governance Contribute to continuous improvement of manufacturing quality systems by strengthening SPC methodology, excursion management, control plan execution, data visibility, and quality governance practices. Qualifications PhD preferred, or MS in Materials Science, Electrical Engineering, Chemical Engineering, Physics, or a related engineering discipline. 5-10 years of experience in semiconductor or HDD high-volume manufacturing (HVM). Hands-on experience in yield improvement, process control, process integration, or manufacturing engineering. Experience investigating yield excursions and driving structured problem-solving is strongly preferred. Demonstrated ability to independently drive complex technical issues and implement sustainable corrective actions in a fast-paced manufacturing environment. Strong analytical and statistical skills with experience in SPC, DOE, JMP (or equivalent statistical tools), and data-driven decision making. Excellent communication and cross-functional influencing skills, with the ability to build alignment and drive execution across Integration, Process, Equipment, Manufacturing, and Quality organizations without direct authority. Experience with 8D problem solving, excursion management, Six Sigma methodologies, and continuous process improvement is highly desirable.