Internship, SoC Firmware Engineer, SI Hardware Infrastructure (Winter/Spring 2027)

Consider before submitting an application:

This position is expected to start January 2027 and continue through Spring term (ending approximately May 2027) or continuing into Summer 2027 if available and there is an opportunity to do so. We ask for a minimum of 12 weeks, full-time (40 hours/week) and on-site, for most internships. Our internship program is for students who are actively enrolled in an academic program.Recent graduates seeking employment after graduation and not returning to school should apply for full-time positions, not internships.

The SI Hardware Engineering organization builds custom SoC's inside Tesla's Full Self-Driving (FSD) Inference and Training computers, which runs in millions of Tesla products. We are embedded engineers working where hardware and software meet, and hardware/software co-design is central to what we do. We own the full firmware stack, from the very first instruction in ROM to complex real-time operating system (RTOS) applications. The code is high-performance, safety-critical, and security-minded and much of the development happens before the silicon physically exists, on FPGA and emulation platforms.

As a Spring 2027 intern, you will be a contributing member of the firmware team, not an observer. You will own a defined project with support from a mentor on the team, write firmware for Training and inference SoC's on both pre-silicon platforms and real hardware, and work next to the architects who design the chip. By the end of the internship, you will have merged code, debugged real hardware, and helped confirm a new SoC is functional, performant, and reliable.

• Write and debug C firmware for RTOS and bare-metal environments and take part in code reviews
• Bring up and test firmware on pre-silicon platforms (FPGA, emulation) and on target boards in the lab
• Write or extend low-level drivers for interfaces such as SPI, I2C, and UART, and learn how complex subsystems such as PCIe, DDR, CAN, and Ethernet are brought up
• Find the root cause of hardware-level bugs with JTAG debuggers, logic analyzers, and oscilloscopes
• Build host tools for code generation, test automation, and log analysis, and improve the build system
• Add unit tests and hardware-in-the-loop (HIL) tests for the code you write
• Document your design, results, and open risks so the team can build on your work